FPGA Based Blockchain Design

April 2018

Knowledge Resources GmbH is proud to announce its first Xilinx FPGA-based blockchain design.

The most distinguishing aspects of our approach are that it simultaneously utilizes the power of six FPGAs, and that it can effectively be implemented with any FPGA family, even the ones dating back to the last millennium. One could even say that KR’s design is geared towards utilizing older FPGA architectures that otherwise would no longer have meaningful applications.

 Speaking of applications, if you are interested in (and capable of) designing sophisticated computing architectures that span multiple FPGAs (not necessarily arranged as a cube), we really want to hear from you.. find out more here.

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Posted in News, Our Thinking

KR is expanding & hiring

January 2018

In 2017 we completed our relocation to a larger facility and expanded our in house capabilities, now it is time to strengthen our Engineering team.

We have multiple openings for Embedded Systems developers, please see details of our job-openings here, we are looking forward to your application!

UPDATE  August 2018, we have filled our immediate vacancies but are still considering spontaneous applications of highly motivated & skilled developers..

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NEW Location

June 2017

As of June 1st 2017 Knowledge Resources GmbH resides at Ackerstrasse 30 in 4057 Basel. This long overdue move gives us the space we need to expand as we quadruple our space. Due to our location within a Swsscom facility, we also enjoy much improved internet access which enhances the remote access experience of our clients substantially. Look for further announcements as we get settled and take advantage of our new “playground” ;-)

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MPSoC KIT Promotion

December 2016

We are proud to announce the introduction of our newest Module Familly with a special, limited time introdutory offer for our most capable evaluation kit ever. Benefit from a sizeable discount and free shipping if you order the kit before December 21st 2016. Get the promotion Flyer with all the relevant information here



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The “Perfect” FPGA Module (Part 3)

You may have read our previous Blog about how “perfect” our modules are, here you can read how we keep improving a “perfect” thing

 So how do you improve a “perfect” module ? You look at the things that cause the most effort in daily use and see if there is not a simpler way. And that is exactly what we did..

 We found that it is nice to be able to change things such as boot-mode or the value of the I/O Auxiliary Voltage, or to change the timing of the ready signal to the carrier board etcetera. Even in our original KRM-3xx modules all those things were possible, but required a steady hand and a soldering iron to move configuration resistors or jumpers. While changing the I/O Auxiliary Voltage is rarely done, swapping boot-modes between on board QSPI and off board SD for example can happen several times during development. This quickly becomes tedious and the most efficient way is to use two differently configured boards that are swapped out as you need them. This is not very efficient and the wear on the connectors will at some point become excessive and lead to failure.

 So the obvious improvement is to implement these settings as a firmware choice rather than a hard patch, and we did. A new BMC (Board Management Controller) handles all aspects of Module configuration, sequencing of power rails and reset signals.

 Our first module to implement the new HW is the new KRM-1Z7010 REVB. The initial firmware release can detect if it is situated on a legacy carrier and enters REVA emulation mode where Reset and config-done behave just like REV A Modules.

 If the Module detects a smart carrier such as the KRC1710, the Reset and Config-done pins assume the function of an I2C bus and the power manager of the carrier can query the Modules condition, serial number and issue commands to power down, read current consumption, change boot mode etc.  Future FW upgrades will expand on the range of functions that a modules BMC will offer, details will follow and we’re always open to suggestions by the way…

 Since we implemented the advanced features on two signaling pins that are consistently available on all of the KRM-3Zxx and KRM-1Zxx modules, we will gradually upgrade the entire range to support the enhanced functionality. Backwards compatibility is assured and we’ll continue to ship earlier revisions to anyone that prefers that.

 I conclude this post by noting that “perfection” is relative and we’ll do our best to improve our version of it, a little every day ;-)

Posted in Our Thinking

Zynq Ultrascale+ Preview

July 2016

Our latest Module Family features MPSoC parts and offers the highest versatility, logic density, I/O count and processing power in a 75mm x 100mm form- factor. Our KRM-5ZUxx modules feature 4HP PL banks, 3HD PL banks, 2MIO banks, 4PS GTR transceivers and 24 PL GTX transceivers at up to 16Gb/s. DDR4 memory can be populated by SODIMM and can accommodate modules up to 16GB. Inquire now for early access to samples, and further technical information.KRM-5ZUXX

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SDSoC 2016.1 support

May 2016: Find the latest SDSoC 2016.1 support for the KRM-3Z70xx family of  Zynq modules here

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Updated VIVADO Scripts

May 2016 : Updated Vivado scripts with support for the KRM-1Z7010 and KRC1710 carrier have been added. Validated with the new 2016.1 release of Vivado. Get the current version here

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New Quick Start Guide for KRC3600

April 2016: A new QSG is available to clarify the customization and startup behavior of the KRC3600 carrier. Learn how to configure the SD card for the module of choice and how to set the various jumpers here

Posted in News

Meet us in Eindhoven

February 2016 Meet us at the Xilinx SDSoC Event at the Novotol in Eindhoven on March 3rd 2016. We will present our full range of Modules, all with support for the cutting edge SDSoC environment from Xilinx.

See a demo of a KRM-3Z20 Zynq SOM do real time image processing and feature extraction in our swarm robot platform.

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Posted in Events, Featured